GENERAL DESCRIPTION
The PALCE16V8 is an advanced PAL device built with
low-power, high-speed, electrically-erasable CMOS
technology. It is functionally compatible with all 20-pin
GAL devices. The macrocells provide a universal device
architecture. The PALCE16V8 will directly replace the
PAL16R8 and PAL10H8 series devices, with the excep-
tion of the PAL16C1.
The PALCE16V8 utilizes the familiar sum-of-products
(AND/OR) architecture that allows users to implement
complex logic functions easily and efficiently. Multiple
levels of combinatorial logic can always be reduced to
sum-of-products form, taking advantage of the very
wide input gates available in PAL devices. The equa-
tions are programmed into the device through floating-
gate cells in the AND logic array that can be erased
electrically.
The fixed OR array allows up to eight data product terms
per output for logic functions. The sum of these products
feeds the output macrocell. Each macrocell can be pro-
grammed as registered or combinatorial with an active-
high or active-low output. The output configuration is
determined by two global bits and one local bit
controlling four multiplexers in each macrocell.
AMD’s Fusion PLD program allows PALCE16V8 de-
signs to be implemented using a wide variety of popular
industry-standard design tools. By working closely with
the Fusion PLD partners, AMD certifies that the tools
provide accurate, quality support. By ensuring that third-
party tools are available, costs are lowered because a
designer does not have to buy a complete set of new
tools for each device. The Fusion PLD program also
greatly reduces design time since a designer can use a
tool that is already installed and familiar.
For datasheet search…PALCE16V8 Family