Description
Motorola MC14043BCP
MSI Quad R–S Latch CMOS I.C.
The MC14043B and MC14044B quad R–S latches are constructed withMOS P–channel and N–channel enhancement mode devices in a singlemonolithic structure. Each latch has an independent Q output and set andreset inputs. The Q outputs are gated through three–state buffers having acommon enable input. The outputs are enabled with a logical “1” or high onthe enable input; a logical “0” or low disconnects the latch from the Q outputs.
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