S.T. 74HC112B1 Dual J-K Flip Flop With Preset and Clear 16 PDIP OMA047C

Description

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1 Piece

GENERAL DESCRIPTION 

The M74HC112 is a high speed CMOS DUAL J-K FLIP-FLOP WITH PRESET AND CLEAR fabricated with silicon gate C2MOS technology. The M74HC112 dual JK flip-flop features individual J, K, clock, and asynchronous set and clear inputs for each flip-flop. When the clock goes high, the inputs are enabled and data will be accepted. The logic level of the J and K inputs may be allowed to change when the clock pulse is high and the bistable will function as shown in the truth table. Input data is transferred to the input on the negative going edge of the clock pulse. All inputs are equipped with protection circuits against static discharge and transient excess voltage.
Genuine ST new and tubed but old stock, date coded 9908.   

HIGH SPEED: fMAX = 79MHz (TYP.) at VCC = 6V ■ LOW POWER DISSIPATION: ICC =2µA(MAX.) at TA=25°C ■ HIGH NOISE IMMUNITY: VNIH = VNIL = 28% VCC (MIN.) ■ SYMMETRICAL OUTPUT IMPEDANCE: |IOH| = IOL = 4mA (MIN) ■ BALANCED PROPAGATION DELAYS: tPLH ≅ tPHL ■ WIDE OPERATING VOLTAGE RANGE: VCC (OPR) = 2V to 6V ■ PIN AND FUNCTION COMPATIBLE WITH 54 SERIES 112 ■ SPACE GRADE-1: ESA SCC QUALIFIED ■ 50 krad QUALIFIED, 100 krad AVAILABLE ON REQUEST ■ NO SEL UNDER HIGH LET HEAVY IONS IRRADIATION ■ DEVICE FULLY COMPLIANT WITH SCC-9203-051

For datasheet search…74HC112B1

Or go directly to…  

http://pdf.datasheetcatalog.com/datasheet/stmicroelectronics/1891.pdf              

PLEASE NOTE!

These parts came to us as part of a lot of surplus stock from a large ‘Milspec’ type Company and have been kept in storage for some time, they are however pristine, stored with us sealed in original packaging and in good serviceable condition, the photographs are representative of their general appearance, being of some of our actual stock, and, as with all our products they come with a full guarantee.